Many electronic devices and systems include integrated circuits for the storage of data during the operation of the devices. For example, electronic devices such as computers, printing devices, scanning devices, personal digital assistants, calculators, computer work stations, audio and/or video devices, communications devices such as cellular telephones, and routers for packet switched networks may include memory in the form of integrated circuits for retaining data as part of their operation. Advantages of using integrated circuit or embedded memory compared to other forms of memory include space conservation and miniaturization, conservation of limited battery resources, decreased access time to data stored in the memory, and cutting the costs of assembling the electronic devices.
Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM) are examples of integrated circuited memory. DRAM and SRAM typically comprise an array of semiconductor capacitor memory cells, each of which hold an amount of electric charge that represents the logical value of a stored bit. The memory cells in the array are typically arranged in rows and columns. Each memory cell is situated at the intersection of a row and a column. Each memory cell in the array may be accessed by simultaneously addressing the intersecting row and column.
In operation, internal sense amplifiers in the embedded memory sense the amounts of electric charges stored on the capacitive memory cells. Based on the sensed electric charges, the outputs of the sense amplifiers represent the logical values of the bits that are stored in the memory array. In this manner, the data stored the array may be extracted from the embedded memory for use by other circuits. In addition, other circuits may store logical values of bits in the memory array by way of an internal memory write driver that is capable of charging or discharging memory cells.
The sense amplifiers and write driver connect to the memory cells through bit line pairs, a bit line and a complementary bit line, which comprise the columns of the embedded memory. Before reading or writing to a cell, residual charge on the bit line pair that addresses the cell is removed. The residual charge is the remnant of a prior read or write operation on the bit line pair. In general, more residual charge is present on the bit line pair after a write operation as compared to after a read operation. This is because a read operation only partially charges/discharges the bit line pair, to a minimal charge level that still allows a distinction between a one bit and a zero bit, while the write operation more fully charges/discharges the bit line pair.
The residual charge is removed by precharging the bit line pair to a common potential before performing the read or write operation. FIG. 1A illustrates a conventional way in which precharge time is defined. The bit line (bl_t) and the complementary bit line (bl_c) begin precharging when a recovery signal (blrec) reaches 50% of a supply voltage Vdd. The precharge time ends when both the bit line and the complementary bit line reach a predetermined percent (e.g., a percent) of Vdd.
The charge on the bit line and the complementary bit line are also equalized so that they are close in charge level. FIG. 1B illustrates a conventional way in which equalization time is measured. The equalization time starts when the recovery signal (blrec) reaches 50% of the supply voltage Vdd. The equalization time ends when the bit line and the complementary bit line are within a predetermined differential voltage ΔV.